Masters Intern ASIC Digital Design, Verification

Job Description And Requirements

Starting in 2024 or early 2025, this 8 to 16 months internship position is for Masters students enrolled in Electronics/Computer/Electrical Engineering program

What you will learn:

The following are examples of tasks that you would be doing during this internship.

• RTL coding and analog block modeling in Verilog/System-Verilog
• Assisting with verification of designed blocks
• Analyzing Clock/Reset domain crossing issues
• Debugging RTL and gate-level simulation failures
• Writing Perl/Python scripts to enhance workflow
  
  

Skill Requirements:

• Proficient in languages such as C, Verilog, SystemVerilog, Python and Perl
• Excellent knowledge of digital design theory
• Motivated, eager, and interested in ASIC digital design
• Persistence and determination
  
  

Education Requirements:

• Enrolled in Electronics or Computer or Electrical Engineering with focus on digital design, semiconductor and related topics
• Include your transcripts along with your resume
  
  

Working at Synopsys, you’ll:

• Be surrounded by people who are motivated by integrity, execution excellence, leadership, and passion.
• Make an impact right away by helping our customers solve complex challenges.
• Help us catalyze Smart Everything, where everything is getting smarter, linked, and safer.
• Be part of a diverse workforce, where different perspectives, ideas, and backgrounds matter.
• Be inspired by our “Yes, if” mindset, which drives our employees to challenge themselves and each other to shift perspectives and see what is possible, not impossible, when encountering a challenge.
• Take pride in making a positive impact on our ecosystem, shareholders, each other, customers, communities, and the planet.
  
  

The Solutions Group provides high-quality, silicon-proven semiconductor IP solutions for SoC designs. The Synopsys IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors, and subsystems. To accelerate IP integration, software development, and silicon bring-up, Synopsys’ IP Accelerated initiative provides architecture design expertise, pre-verified and customizable IP subsystems, hardening, signal/power integrity analysis, and IP prototyping kits. Synopsys' extensive investment in IP quality, comprehensive technical support, and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.