ASIC Digital Design Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

We are seeking a highly motivated and innovative digital design engineer with a deep understanding of ASIC development flow. You are passionate about working on cutting-edge technology and thrive in a dynamic environment. You possess a sound theoretical and practical background in high-speed serializer and data recovery circuits, which allows you to contribute effectively to our mixed-signal design and verification team. You are excited by the challenge of working on current and next-generation NRZ and PAM-based SerDes products. You are an autonomous problem solver, capable of resolving issues in inventive ways and demonstrating sound judgment. Your ability to adapt to constant technological changes while owning your projects and navigating uncharted waters sets you apart. You are eager to learn from top experts in the field and continuously grow through on-the-job training and assignments.

What You’ll Be Doing:

• Designing and verifying ASIC RTL at both chip and block levels.
• Collaborating with a highly experienced mixed-signal design and verification team.
• Developing and enhancing SERDES PHY IP.
• Defining synthesis design constraints and resolving STA (Static Timing Analysis) issues.
• Writing complex system-level test-benches in Verilog.
• Interacting with application engineers and customers to support and resolve technical issues.
  
  

The Impact You Will Have:

• Driving the development of high-performance silicon chips.
• Contributing to the innovation of next-generation NRZ and PAM-based SerDes products.
• Ensuring the delivery of high-end mixed-signal designs.
• Enhancing our PHY IP development through continuous improvement and innovation.
• Supporting the success of our customers by resolving technical issues.
• Helping Synopsys maintain its leadership in chip design and verification.
  
  

What You’ll Need:

• BSEE or MSEE in digital design and verification.
• Proficiency in Verilog and VCS.
• Experience with back-end synthesis tools such as Design Compiler /Prime Time.
• Scripting experience in Shell, Perl, Python, and TCL.
• Knowledge of DFT (Design For Test) and Silicon Validation.
• Experience with SpyGlass LINT, CDC, and RDC tools.
• Good theoretical and practical knowledge of DSP and data recovery circuits.
  
  

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.