Analog Layout Methodology Engineer - 12362

We Are:

At Synopsys, we’re at the heart of innovations that transform the way we live, work, and play. As part of the Mixed Signal IP Methodology Team, you will work with the world’s most advanced technologies for chip design, leveraging best-in-class Synopsys tools. We collaborate across cross-functional teams—including Circuit Design, Physical Design, and CAD—to tackle the challenges of advanced technology nodes and deliver high-quality IP solutions efficiently. Join us and be a part of a culture that fosters continuous learning, teamwork, and technological excellence.

You Are:

You are an adaptable and detail-oriented engineer with 2-5 years of hands-on experience in analog or mixed-signal layout, or ASIC physical design. You have a foundational understanding of advanced CMOS technologies, and are eager to deepen your expertise in FinFET nodes and high-speed circuit layouts. Your curiosity drives you to seek out new methodologies and workflows that improve quality and efficiency. You are comfortable working collaboratively with multidisciplinary teams across locations and time zones, and your strong communication skills mean you can clearly articulate technical concepts to peers and stakeholders. You thrive in environments where you can manage multiple tasks, contribute ideas, and continue your professional growth. Your organizational skills, attention to detail, and willingness to learn make you a valued contributor to any project.

What You’ll Be Doing:

• Proposing and helping implement innovative methodologies to accelerate layout processes while maintaining high quality standards.
• Collaborating with cross-functional teams (Circuit Design, Physical Design, CAD) to support enablement and adoption of advanced technology nodes.
• Coordinating with geographically distributed teams to ensure workflow alignment and project success.
• Measuring project and team performance using appropriate systems and tools.
• Creating, updating, and maintaining comprehensive methodology and workflow documentation.
• Building and nurturing relationships with internal partners and, where appropriate, external customers.
• Participating in the development and validation of analog/mixed-signal layout methodologies using industry-standard and custom tools.
  
  

The Impact You Will Have:

• Enabling faster and more reliable analog/mixed-signal IP development for advanced technology nodes.
• Improving layout quality and efficiency across Synopsys’ global design teams.
• Strengthening collaboration and knowledge sharing across technical disciplines.
• Supporting the adoption of leading-edge tools and methodologies within the organization.
• Enhancing documentation and workflow transparency for current and future projects.
• Helping maintain Synopsys’ reputation as a leader in semiconductor design innovation.
  
  

What You’ll Need:

• 2-5 years of experience in analog/mixed-signal layout or ASIC physical design (advanced technology nodes preferred).
• Familiarity with physical design of analog and mixed-signal CMOS circuits.
• Exposure to the full IC design cycle, from RTL to GDSII, including chip-level integration.
• Experience with industry-standard design tools (e.g., Custom Compiler, Cadence Virtuoso) and verification tools (e.g., ICV, Calibre).
• Organizational skills, attention to detail, and ability to manage multiple tasks.
• Strong communication skills for effective collaboration across teams.
  
  

Who You Are:

• A proactive and collaborative team player who enjoys solving complex problems.
• Comfortable working in a fast-paced, multidisciplinary environment.
• Detail-oriented and organized, with a passion for continuous improvement.
• Strong communicator, able to convey technical concepts at various levels of abstraction.
• Open to learning, adaptable to change, and eager to grow your technical skills.
  
  

The Team You’ll Be A Part Of:

You’ll be part of the Mixed Signal IP Methodology Team, an advanced physical design group dedicated to developing full custom analog and ASIC layout for high-speed integrated circuits. The team is known for its collaborative spirit, advanced tool suite, and commitment to innovation. You’ll work alongside experienced engineers, CAD experts, and circuit designers, all focused on delivering best-in-class solutions for Synopsys’ customers worldwide.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.