Design Verification Engineer

Company

Qualcomm Canada ULC

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

QUALCOMM is the world's leading developer of next-generation wireless and multimedia technology.

We are searching for an ASIC design verification engineer interested in developing world-class solutions for the next generation of AI/ML HW IP.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field.
  
  
  

Required Skills/Experience

• Strong analytical and debugging skills
• Good working experience with C/C++
• Strong knowledge of Object Oriented Programming (OOP) concepts
• Hardware verification languages (HVL): SystemVerilog testbench (UVM), and/or SystemC
• Hardware description languages (HDL): Verilog and SystemVerilog
• Knowledgeable in one or more of the following disciplines is preferred: Display (Pixel processing/composition/compression, MIPI DSI, DisplayPort, HDMI etc.), Bus/interconnect (AHB, AXI)
• Strong knowledge of digital circuits and event-driven simulators
• Knowledgeable with Perl, Python, TCL, tcsh, and GNU Make
• Strong communication skills (written and verbal) to convey complex information to peers.
• Detailed oriented and be able to plan and prioritize tasks effectively.
  
  
  

Preferred Qualifications

• Prior experience delivering Verilog and/or System Verilog RTL
• Detail oriented with strong analytical and debugging skills
• Strong communication (written and verbal), collaboration, and specification skills
• Practiced working experience with some of the following concepts:
• Clock domain crossing and reset architecture
• Machine Learning HW development
• FIFOs implementation
• Bus implementation/verification techniques
• Memory selection and control
• High speed and low power design optimization
• Bus interface protocols (AHB, AXI)
  
• Experience with some of the following
• Simulation and code coverage tools (VCS, Verdi, Modeltech/Questa, or Xcelium)
• Design rule and CDC checking (SVA assertions, Spyglass, 0-in, etc.)
• Scripting languages (PERL, Python, TCL, C, etc.)
• Power Intent and Analysis: UPF, CLP, PTPX, PowerPro
• Synthesis: DCG/NXT, FC
• Static Timing: Primetime
• Formal Verification: Conformal, Formality
  
  
  

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If you would like more information about this role, please contact Qualcomm Careers.