Senior ASIC Verification Engineer, Low Power AI Subsystems at Qualcomm

Company

Qualcomm Canada ULC

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

What we are doing has not been done.

Shape the future of low power AI subsystems.

Push the boundaries on features and performance.

Qualcomm Technologies Audio products are designed to offer premium wireless connectivity, high levels of integration, immersive sound quality, and on-device AI for smart audio and context aware applications. An ultra-low power subsystem within a low power SoC; a chip-within-a-chip HW block incorporating multiple always-on IP's, design execution within this group requires solving ground-breaking challenges and multiple power domain crossing issues.

As we pioneer new and/or improved functionality, we innovate to minimize power consumption.

Make a difference, join a team on the cutting edge and become an integral part of Qualcomm’s growth and momentum.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
  
  
  

OR

Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

OR

PhD in Science, Engineering, or related field.

We are looking for an ASIC Verification Engineer to be part of our team to innovate and design complex leading, ultra-low power, solutions for audio and context aware applications.

As part of our team your responsibilities will be focused on key ASIC verification tasks such as:

• Contribute to core verification during the pre/post silicon phase of next generation ASICs through simulation
• Drive test plan development, execution and verification closure in conjunction with the design and verification teams
• Contribute to creating/maintaining a test bench, assertions, and functional coverage models with scalability and reuse as key goals
• Contribute to implementing flows to automate development processes. Identify areas for improvement and drive them to completion
• Lead complex debug activities through the development cycle (pre and post-silicon)
• Provide technical supervision to other engineers and have the ability to lead by example
• Work closely with design to define verification methodology, Provide test plans and develop required tests.
  
  
  

Specific responsibilities will be a function of project and team needs and may vary over time.

Requirements

• 3+ years ASIC design, verification, implementation or related work experience
• Proficiency with Verilog/VHDL RTL design languages and ability to write clean, readable, synthesizable RTL.
• Solid understanding of ASIC/VLSI concepts
• Hardware verification languages (HVL): SystemVerilog testbench (UVM), and/or SystemC,
• Hardware description languages (HDL): Verilog and/or SystemVerilog
• Good working experience with C (basic level or C++ sufficient)
  
  
  

Preferred Qualifications

• Knowledge in one or more of the following disciplines is preferred: Audio (MP3, MIDI, etc.), Bus/interconnect (AHB, AXI), CPU (ARM v8/v7, Cache, MMU, security, etc.).
• Strong knowledge of digital circuits and event-driven simulators
• Knowledge of Perl, tcsh, Python and GNU Make is a strong asset
• Experience with automotive safety concepts and standards such as ISO26262
  
  
  

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