Senior Staff Layout Design Engineer
Synopsys Inc
Date: 2 weeks ago
City: Mississauga, ON
Contract type: Full time
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
As a Sr. Staff A&MS Layout Engineer, you are a seasoned professional with a passion for analog and mixed-signal integrated circuit design. You bring extensive experience in developing layouts for complex mixed-signal designs, particularly in advanced technology nodes. You have experience as a technical layout design expert on fabrication flows and physical background behind layout design flows and techniques. You are able to work independently to work on complex issues where analysis of data requires and in-depth evaluation of variable factors, and can resolve a wide range of issues in creative ways as well as encouraging others to support a new solution or direction. You are adept at collaborating with both local and global teams, taking on product-level ownership, and acting as a technical lead in critical development projects. Your expertise allows you to interact directly with internal and external customers, representing our organization with confidence and authority. You thrive in fast-paced environments and are committed to continuous learning and innovation. Your technical proficiency is matched by your ability to mentor junior peers, fostering a culture of growth and development within the team.
What You’ll Be Doing:
You are a collaborative team player with a strong technical background and excellent problem-solving skills. You possess a keen eye for detail and a deep understanding of layout design principles. Your ability to communicate effectively with both technical and non-technical stakeholders sets you apart. You are proactive, adaptable, and thrive in dynamic environments. Your leadership skills enable you to guide and inspire others, contributing to a positive and productive team atmosphere.
The Team You’ll Be A Part Of:
You will join the Solutions IP Design Group, a dynamic team dedicated to developing IP across various technology nodes and foundries. Our team works on a diverse range of projects for different customers, fostering a collaborative and innovative environment. We are committed to pushing the boundaries of technology and delivering high-quality solutions that meet the evolving needs of the industry.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
As a Sr. Staff A&MS Layout Engineer, you are a seasoned professional with a passion for analog and mixed-signal integrated circuit design. You bring extensive experience in developing layouts for complex mixed-signal designs, particularly in advanced technology nodes. You have experience as a technical layout design expert on fabrication flows and physical background behind layout design flows and techniques. You are able to work independently to work on complex issues where analysis of data requires and in-depth evaluation of variable factors, and can resolve a wide range of issues in creative ways as well as encouraging others to support a new solution or direction. You are adept at collaborating with both local and global teams, taking on product-level ownership, and acting as a technical lead in critical development projects. Your expertise allows you to interact directly with internal and external customers, representing our organization with confidence and authority. You thrive in fast-paced environments and are committed to continuous learning and innovation. Your technical proficiency is matched by your ability to mentor junior peers, fostering a culture of growth and development within the team.
What You’ll Be Doing:
- Developing advanced analog integrated circuit layouts using Synopsys tools.
- Collaborating with global teams to design complex mixed-signal layouts.
- Taking ownership of product-level projects with technical expertise.
- Interacting directly with customers to represent Synopsys in technical discussions.
- Mentoring junior engineers and supporting their professional development.
- Ensuring layouts meet signal integrity, reliability, and design constraints.
- Enhancing the performance of high-tech products through innovative layout designs.
- Contributing to the development of cutting-edge technology in the semiconductor industry.
- Ensuring the reliability and efficiency of Synopsys' IP solutions.
- Driving technical excellence in analog and mixed-signal layout design.
- Supporting the growth and development of junior team members.
- Strengthening Synopsys' reputation as a leader in technology innovation.
- Typically requires an MSEE or BSEE with a minimum of 10+ years of related experience, with 2+ years of experience in a technical lead role.
- In-depth familiarity with analog and mixed-signal CMOS circuit layout.
- Experience with SERDES subcircuit layout (e.g., RX, TX, PLL).
- Full custom analog layout design tool: Custom Compiler (or equivalent)
- Exposure to scripting languages like TCL and PERL.
- Experience in the following layout design techniques:
- Optimization for signal integrity (ie. clock/data routes, differential routing, shielding)
- Implementation of ESD design constraints, latch-up risk mitigation
- Familiarity with custom digital layout (logic cell layout and associated logic path routing)
- Layout design for reliability (ie. EM, IR, etc…)
- Design to optimize for parasitic layout effects (ie. matching, reliability, proximity effects, etc…)
- Familiarity in design for porting techniques
- Verification tools: ICV, Star-RCXT, PERC (or equivalent)
- Experience in working with Jira/Atlassian (or other such) tools
You are a collaborative team player with a strong technical background and excellent problem-solving skills. You possess a keen eye for detail and a deep understanding of layout design principles. Your ability to communicate effectively with both technical and non-technical stakeholders sets you apart. You are proactive, adaptable, and thrive in dynamic environments. Your leadership skills enable you to guide and inspire others, contributing to a positive and productive team atmosphere.
The Team You’ll Be A Part Of:
You will join the Solutions IP Design Group, a dynamic team dedicated to developing IP across various technology nodes and foundries. Our team works on a diverse range of projects for different customers, fostering a collaborative and innovative environment. We are committed to pushing the boundaries of technology and delivering high-quality solutions that meet the evolving needs of the industry.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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